Hardware scoreboard

A 105-qubit superconducting processor ran surface-code memories at distance 3, 5 and 7. Each step of +2 in code distance suppressed the logical error rate by Λ = 2.14 ± 0.02; the distance-7 code reached 0.143% ± 0.003% error per cycle with real-time decoding. The logical memory also beat break-even, outliving the processor's best physical qubit by 2.4 ± 0.3×.

Four logical qubits encoded in 30 trapped-ion physical qubits on Quantinuum's H2, with a logical error rate reported 800× lower than the physical rate and more than 14,000 circuit trials without an uncorrected error. The first widely cited demonstration that encoded qubits can beat the raw qubits they are built from.

Twelve logical qubits created and entangled on H2 with the same 800× single-qubit improvement, and a 22× circuit-error improvement over the corresponding physical circuit when all twelve were entangled.

A reconfigurable neutral-atom processor ran algorithms on up to 48 logical qubits with hundreds of logical gates — the first logical-qubit demonstration at that scale — using 280 physical atoms and error-detecting codes.

An integrated architecture on 448 atomic qubits combining the essential elements of fault-tolerant computation and demonstrating below-threshold error suppression; reported as 96 logical qubits using high-rate [[16,6,4]] codes, published in Nature in January 2026.

Helios launched with 98 fully connected trapped-ion qubits, 99.921% average two-qubit gate fidelity and 99.9975% single-qubit fidelity. Three distinct logical results were reported — read the distinctions carefully: 94 error-*detected* logical qubits entangled in a GHZ state (~1:1 encoding, Iceberg code); 50 error-detected logical qubits at better-than-break-even; and 48 error-*corrected* logical qubits at a 2:1 physical-to-logical ratio via code concatenation.

Microsoft announced a processor with eight 'topological' qubits by press release. The accompanying Nature paper stopped short of demonstrating a topological qubit, and Nature's editorial note stated the results 'do not represent evidence for the presence of Majorana zero modes'. A peer-reviewed challenge by Henry Legg (St Andrews) was later published in Nature alongside Microsoft's rebuttal. Status: not a verified logical-qubit result.

IBM's published path: Loon (2025) demonstrates qLDPC architecture elements; Kookaburra (2026) the first fault-tolerant module; Cockatoo (2027) entanglement between modules; Starling (2029) a full system executing 100 million gates on 200 logical qubits; Blue Jay (after 2033) one billion operations on 2,000 logical qubits.

Quantinuum's roadmap names Sol for 2027 (trap chip 'back from fabrication and advancing through product validation' as of 2026) and Apollo for 2029, described as 'fully fault-tolerant and universal', with 'hundreds of logical qubits' by 2030.

IonQ's roadmap page lists 12 logical qubits in 2026, 10,000 physical / 800 logical in 2027, 20,000 physical / 1,600 logical in 2028, and 2,000,000 physical / 80,000 logical in 2030 at 99.99% physical fidelity. These are the most aggressive public targets in the industry and should be read as such.

Announced in April 2024 with AU$940M in Australian federal and state backing; a second site in Chicago was announced with a US$760M Illinois commitment. Photonic architecture; no intermediate logical-qubit results have been published on the scale of the milestones above.